Hardware Design of an Advanced-Feature Cryptographic Tile within the European Processor Initiative

This work describes the hardware implementation of a cryptographic accelerators suite, named Crypto-Tile, in framework European Processor Initiative (EPI) project. The EPI project traced roadmap to develop first family low-power processors with design fully made Europe, for Big Data, supercomputers and automotive. Each coprocessors Crypto-Tile is dedicated specific algorithms, offering functions symmetric public-key cryptography, computation digests, generation random numbers, Post-Quantum cryptography. performances each coprocessor outperform other available solutions, innovative hardware-native services, such as key management, clock randomisation access privilege mechanisms. system has been synthesised on 7 nm standard-cell technology, being Cryptoprocessor be characterised an advanced silicon technology. post-synthesis netlist employed assess resistance power analysis side-channel attacks. Finally, demoboard implemented, integrating RISC-V softcore processor module, drivers abstraction layer, bare-metal applications Linux kernel C language have developed. we exploited them compare terms execution speed hardware-accelerated algorithms against software-only solutions.